# Digital Electronics Symbols / Logic Gate Symbols

**Devices, components or electronic circuits** that perform operations based on two states (1 - 0) needed to obtain the logical decisions. Logic circuits are composed of digital elements such as **AND gate, OR gate, NOT gate** and other complex combinations of these same circuits.

Symbol | Description | Symbol | Description | |
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## Logic Gate Symbols, ANSI System |
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Logic gate AND gate |
Logic gate OR gate |
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Logic gate NAND gate |
Logic gate NOR gate |
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NAND logic gate tri-state | Logic gate OR exclusive XOR gate |
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Logic gate that functions AND and NAND | Logic gate NOR exclusive XNOR gate |
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Logic gate that functions OR and NOR | Equivalent to logic gate XNOR | |||

Logic buffer | Logic inverter NOT |
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Logic buffer tri-state | Logic buffer denied | |||

Differential | Logic driver | |||

## Logic Gate Symbols, British System (BS 3939) |
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Logic gate AND gate |
Logic gate OR gate |
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Logic gate AND gate |
Logic gate OR gate |
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Logic gate NAND gate |
Logic gate NOR gate |
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Logic gate NAND gate |
Logic gate NOR gate |
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Exclusive OR logic gate XOR gate |
Exclusive NOR logic gate XNOR gate |
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Buffer | Exclusive OR logic gate XOR gate |
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Logic inverter NOT |
Inverter Schmitt | |||

## Logic Gate Symbols, IEC System |
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Logic gate AND gate |
Logic gate OR gate |
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Logic gate NAND gate |
Logic gate NOR gate |
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Exclusive OR logic gate XOR gate |
Buffer |
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Exclusive NOR logic gate XNOR gate |
Logic inverter NOT |
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## Logic Gate Symbols, DIN System |
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Logic gate AND gate |
Logic gate OR gate |
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Logic gate NAND gate |
Logic gate NOR gate |
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Logic gate XOR | Logic gate XNOR | |||

Logic gate XOR | Logic gate XNOR | |||

Logic inverter Buffer |
Logic inverter NOT gate |
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## Logic Gate Symbols, NEMA System |
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Logic gate AND gate |
Logic gate OR gate |
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Logic gate NAND gate |
Logic gate NOR gate |
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Logic inverter NOT |
Exclusive OR logic gate XOR gate |
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## Flip-Flop Symbols |
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SR Flip-Flop NAND asynchronous |
SR Flip-Flop NOR asynchronous |
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SR Flip-Flop NAND latch, asynchronous |
SR Flip-Flop NOR asynchronous |
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SR Flip-Flop SR synchronous |
SR Flip-Flop SR latch, synchronous |
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SR Flip-Flop Set Reset |
SR Flip-Flop Set Reset |
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JK Flip-Flop master / slave Activated by high level |
JK Flip-Flop master / slave Activated by low level |
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JK Flip-Flop Activated by the rising edge |
JK Flip-Flop Activated by the falling edge |
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JK Flip-Flop Activated by the falling edge |
JK Flip-Flop Generic symbolD Flip-Flop |
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D Flip-Flop Generic symbol |
D Flip-Flop | |||

D Flip-Flop Active for level |
D Flip-Flop Active Edge |
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D Flip-Flop Data / Delay |
D Flip-Flop Data / Delay |
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T Flip-Flop Toggle |
T Flip-Flop Toggle |
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T Flip-Flop Generic symbol |
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## Electronic Logic Circuit Symbols |
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Integrated circuit / IC Chip logic |
Memory Generic symbol |
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555 meter-chrono | 4 bit binary counter | |||

7-segment decoder | Decadic decimal coded binary counter, BCD | |||

Decadico counter with 10 outputs encoded | Decoder 1 to 4 | |||

DAC Analog to digital converter |
DAC Analog to digital converter |
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ADC Digital to Analog Converter |
Multiplexer | |||

Logic adder | Multiplexer, 2 in 1 out | |||

Semi-adder | Multiplexer, 4 inputs 1 output | |||

Central Processing Unit CPU |
1 input 4-output demultiplexer | |||

## Display Symbols |
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Display 7 segment LED | Alphanumeric indicator LED 5x7 e.g. letter A |
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16 segment alphanumeric display | ||||

## Symbols Programming Conventions |
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Programmable connection intact | Fixed connection | |||

No connection |